The present invention relates to devices for the phase amplitude demodulation of a received radar signal, this demodulation generally taking place after transposition of the UHF signal into intermediate frequency.
Traditionally, radars in which Doppler filtering or digital pulse compression is carried out necessitate the use of receivers including a coherent detection device. These devices which are also called demodulators give information on the amplitude and phase of the received signals. These coherent detection radar receivers therefore include, after an intermediate frequency amplifier, two phase amplitude detectors which work together in quadrature in order to carry out amplitude and phase demodulation. This demodulation consists in shifting the whole spectrum of the carrier frequency in order to bring one of the two spectra (real spectrum or image spectrum) into base band. Then, a low pass filtering is carried out in order to eliminate the image spectrum. These phase amplitude detectors are controlled by the output signal of a local reference oscillator at intermediate frequency. The video output signals are generally called I and Q.
Now, the two channels I and Q which come from the two phase amplitude detectors, are followed by two sampling and coding devices. A balance fault between these two channels I and Q can appear at the point of phase amplitude detection, which gives a slight unbalance in amplitude in these two channels and also a quadrature fault, in other words a phase shift slightly different from 90xc2x0 from the local oscillator reference signal FI also gives a phase unbalance in the two channels I and Q.
These faults can be compensated for by adjustment loops associated with very powerful computation algorithms but despite everything they remain an element limiting the performance of radar signal processing devices. In particular they cause a rising of secondary lobes at the output of the Doppler filters which is undesirable. In the same way this rising of secondary lobes also appears in digital pulse compression devices whereas it is required to reduce the secondary lobes as much as possible.
Another solution solving this problem of balance consists in using devices for the automatic balancing of the gain and the quadrature of the video signals I and Q. A description of this solution can be found in the following articles: xe2x80x9cRadar Conference 82xe2x80x9d IEE Conference publication number 216 p.46. xe2x80x9cSacrifices in radar clutter suppression due to compromises in implementation of digital Doppler filterxe2x80x9d. I. W. TAYLOR; or IEE Trans. AES 17 p. 131 xe2x80x9cthe correction of I and Q errors in a coherent processorxe2x80x9d. The implemented devices are not however always simple and sometimes complicate the production of signal processing devices.
The present invention relates to a process for the phase amplitude demodulation of a received radar signal consisting in the direct sampling of the intermediate frequency fi received signal at a frequency of fe which is lower than that intermediate frequency.
In fact, one characteristic of the process consists in sampling the fi signal at a frequency fe equal to xcex1B, B corresponding to the reception pass band and xcex1 being a positive number greater than or equal to 2.
Another characteristic of the invention consists in then carrying out a sub-sampling at a frequency fxe2x80x2e such that fxe2x80x2e is approximately equal to B, before or after having brought the signal into baseband by demodulation.
The present invention also relates to a radar receiver implementing the process, which according to a first embodiment includes an intermediate frequency amplifier followed by an analog-digital converter, this converter being followed by a digital processing circuit.
The present invention also relates to a radar receiver implementing the process, which according to a second embodiment includes an intermediate frequency amplifier, a demodulator which brings the intermediate frequency signal to a frequency fxe2x80x2i, such that fxe2x80x2i=f0Lxe2x88x92fxe2x80x2e, f0L being the frequency of the local oscillator and fxe2x80x2e being the sub-sampling frequency, this demodulator being followed by an analog-digital converter.